(i) Technical Field
A certain aspect of embodiments described herein is related to a semiconductor device and a method of manufacturing the semiconductor device. Another aspect of embodiments described herein is related to a semiconductor device including a SiC substrate and a method of manufacturing the same.
(ii) Related Art
A SiC substrate is used as a substrate on which a nitride semiconductor layer such as a gallium nitride (GaN) layer is to be formed. A FET (Field Effect Transistor) such as a high-electron-mobility transistor (HEMT) using a nitride semiconductor is used as a power device that outputs high power at high frequencies. A via hole that penetrates through the substrate from the surface to the bottom surface thereof is formed in the substrate, and the inner face of the via hole is covered with a metal layer. Through the via hole, an electrical connection to a semiconductor device such as an FET formed on the surface of the substrate can be established from the bottom surface of the substrate. With this arrangement, the parasitic impedance can be reduced when an electrical connection to the semiconductor device is established (Japanese Patent Application Publication No. 2009-289935).
In a SiC substrate, however, there exist pipe-like defects called “micropipes”. Therefore, when a via hole is formed in a SiC substrate from the bottom surface thereof, the etching speed is higher in the vicinities of micropipes in the SiC substrate. As a result of this, the pad that is formed on the surface of the substrate and is exposed through the via hole have large concavities and convexities. In some cases, those concavities and convexities grow to penetrate through the pad.